Root Mean Square (RMS) power detectors output a direct current (DC) voltage that is proportional to the input signal power of a waveform. Typically, systems use RMS detectors to detect the power of a Radio Frequency (RF) signal waveform. The RMS detector generally needs a certain amount of integration to determine the RMS value of a signal. The amount of time depends upon the ‘crest factor,’ which is the peak-to-average ratio calculated from the peak amplitude of the waveform divided by the waveform's RMS value.
An issue that arises with RMS detectors lies in the response of the detector to rapid changes between high and low power levels. When the power level changes quickly from low to high, the input of the RF detector suddenly sees a much larger input signal. In response, it generates a large rectified or squared output signal. The output signal of the detector typically consists of a current. The resulting error current, IRF-RMS minus ISET, can get quite large and changes the voltage of the filter very quickly.
However, when the signal changes quickly from high to low, the filter does not discharge very quickly. Typically RMS detectors use an automatic gain control (AGC) with a set-point approach to extend the dynamic range of the detector, also referred to as a squaring cell. These detectors may add a variable gain amplifier (VGA) before the detector and use a second identical detector that has a target voltage, or set point, applied. This second detector with the set point will generate a DC current, typically balanced by the RMS current derived from the RF signal by the VGA and RMS detector. When the signal changes quickly from high to low, the only current available to discharge the filter is the DC current from the set point detector. The resulting problem is that the settling time for rising input signals is much shorter than for falling input signals.
For modem communication signal waveforms with very high crest factors, the required filter capacitor may be rather large to get the required RMS accuracy after settling. Generally, higher power signals are of more importance and require more measurement accuracy. In order to achieve this measurement accuracy, the filter capacitor of a low pass filter may be large enough to cause the falling edge of the high to low signal step to be excessively slow.
A second issue arises when the signal falls outside the VGA range. This causes the AGC loop to drive the detector output to the rails. Since the VGA levels the signal at the RF detector input to keep the detector operating in its optimal range, if the input signal to the VGA is either too large or too small to maintain the output signal level determined by the target DC input voltage, the output of the overall system will go to either the positive or negative supply rails value. When it rails to the positive supply, typically at the highest power levels, it will take even longer for the system to settle when the input power is reduced. This is because the larger voltage has to be reduced by the same fixed set-point current.